1. Field of the Invention
The present invention relates to a synchronizing and driving circuit for a forward converter employing a synchronous rectifier and, more particularly, to a driving circuit utilizing a phase-locked loop to control the switch timing of the synchronous rectifiers.
2. Related Art
In known forward switching power supply circuits employing synchronous rectifiers, the secondary side diodes are replaced by transistors to obtain a lower on-state voltage drop. The transistors must be biased to conduct from source to drain (for an N-channel power MOSFET) when a diode would have been conducting from anode to cathode, and conversely, must be gated to block voltage from drain to source when a diode would have been blocking from cathode to anode.
The timing of turn on/off of the transistors is critical and may become problematic because practical transistors (such as MOSFETs, IGBTs, and the like) exhibit non-zero switching times. While such transistors are turning on and/or off, the current is diverted through parallel or integral diodes, which diodes are more lossy than certain power transistors and, therefore, reduce overall converter efficiency. This problem is exacerbated when the switching frequency is increased and the transistor switching times become a larger part of the overall switching period.
With reference to FIG. 1, a known apparatus for producing the signals for gating on and off the transistors in a synchronous rectifier is shown. In FIG. 1, the synchronous rectifier transistors, Q1 and Q2, are MOSFETs which include anti-parallel diodes thereacross. As is known in the art, Q1 and Q2 are coupled to the secondary winding of a transformer, XFRMR, which drives an output LC circuit. The transistors Q1 and Q2 are connected as so-called cross-coupled switches (i.e., the gates are connected to opposite sides of the XFRMR secondary winding).
FIG. 2 shows an alternative known apparatus for gating the transistors Q1 and Q2, which transistors are connected as so-called two terminal switches. In this arrangement, each power MOSFET, Q1 and Q2, is coupled to a gate circuit, CKT1 and CKT2, respectively, which detects the voltage across the transistor and gates the transistor accordingly.
Other methods of producing the gating signals for the synchronous rectifiers include stand alone linear circuits to sense changes in transformer output voltage and, as described in related U.S. Pat. No. 5,818,704 filed on Apr. 17, 1997 and assigned to the International Rectifier Corporation, circuits which sense inductor signals to produce the gating signals.
The circuits of FIGS. 1 and 2 and the stand alone circuits to sense changes in transformer output voltage suffer from the disadvantage that transformer delays (due to leakage inductance), noise (due to transformer resetting) and limits on device switching times reduce the precision in switching the synchronous rectifiers and, therefore, reduce converter efficiency.
Accordingly, there is a need in the art for a new method and apparatus for producing the gating signals for the synchronous rectifiers in a power converter which does not exhibit the deficiencies as the prior art.